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W4 BSPs and drivers CE 6.0

Writing BSP and drivers for Windows CE 6.0

Writing BSP and drivers for Windows CE 6.0
Windows Embedded CE is a registered trade mark of Microsoft

formateur
Goals
bullet_jaune_1 Master the cross development tools
bullet_jaune_1 Bring the system on the target
bullet_jaune_1 Accessing I / O
bullet_jaune_1 Install kernel interrupt routines and applications
bullet_jaune_1 Develop drivers and Board Support Packages
Course material
bullet_jaune_2 A windows PC and an Atmel target board for two trainees
bullet_jaune_2 Platform Builder for CE 6.0
bullet_jaune_2 Visual Studio 2005
bullet_jaune_2 A Lauterbach probe, with the Windows CE kernel awareness module
bullet_jaune_2 Printed course material and labs solutions
Prerequisite
bullet_jaune_2 Good knowledge of the C language
bullet_jaune_2 Knowledge of application programming on Windows CE 6.0 (as described in cours W3) is mandatory.

Outline
Overview of WindowsCE
bullet_jaune_2 Architecture and versions of Windows CE
bullet_jaune_2 What's new in version 6.0
bullet_jaune_2 Technologies and processors supported
bullet_jaune_2 Embedded specific settings
bullet_jaune_2 Shared source code and licensing system
bullet_jaune_2 Comparison with Windows XP Embedded.
bullet_jaune_2 Comparison with Windows Mobile
bullet_jaune_2 Development tools for Windows Embedded CE
Windows CE architecture
bullet_jaune_2 The Windows CE Kernel
bullet_jaune_2 The Device Manager
bullet_jaune_2 The Graphical Windowing and Events System (GWES)
bullet_jaune_2 Communications services
bullet_jaune_2 Timers, Watchdog timers.
bullet_jaune_2 Interruptions,
bullet_jaune_3 IRQs (Interrupt ReQuest)
bullet_jaune_3 ISR (Interrupt Service Routine)
bullet_jaune_3 The IST (Interrupt Service Thread)
bullet_jaune_3 Interruption APIs
bullet_jaune_2 Memory architecture.
Platform Builder in brief
bullet_jaune_2 Steps to build a Windows Embedded CE platform
bullet_jaune_2 Creating projects and source Workspaces
bullet_jaune_2 Modules and components of the OS
bullet_jaune_2 The source code configuration files
bullet_jaune_3 DIRS
bullet_jaune_3 SOURCES
bullet_jaune_3 Makefile
bullet_jaune_3 Module definition
bullet_jaune_2 Build phases
bullet_jaune_3 Compile
bullet_jaune_3 Sysgen
bullet_jaune_3 Release copy
bullet_jaune_3 Make image
bullet_jaune_2 Configuring Debug and Release configuration
Test and debug
bullet_jaune_2 Kernel Debug
bullet_jaune_2 Debug areas
bullet_jaune_2 Just In Time Debugging (JIT)
bullet_jaune_2 Kernel Profiler, Remote Kernel Tracker, Remote Call Profiler.
bullet_jaune_2 Exception handling
bullet_jaune_2 CETK Tests
bullet_jaune_2 Using remote tools
Developing the Board Support Package (BSP)
bullet_jaune_2 Bootloader development
bullet_jaune_2 Develop the OEM Abstraction Layer (OAL)
bullet_jaune_2 Configuration files
Exercice : Development of a serail line KITL
Exercice : Debug using the Lauterbach probe
Device driver development
bullet_jaune_2 Introduction
bullet_jaune_2 Driver types
bullet_jaune_2 Stream drivers
bullet_jaune_3 interface
bullet_jaune_3 installation (static and dynamic)
bullet_jaune_2 User mode drivers
bullet_jaune_2 Access to physical memory
bullet_jaune_2 Interrupt management
bullet_jaune_2 Parameter marshalling
bullet_jaune_2 Power management
bullet_jaune_2 Test and debug
Exercice : Writing a fully functional button driver
  • driver installation
  • physical memory access
  • interrupt management
  • asynchronous access to the user buffer
  • registration of a button as an alarm source
  • writing a CETK test
Exercice : Writing a LED driver
  • management of power states
Exercice : Demonstrating the use of hardware traces (captured by the Embedded Trace Macrocell) for error detection and fix, using a Lauterbach probe.