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| INTRODUCTION TO AT91SAM9 MCUs |
| Overview |
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ARM core based architecture, AMBA buses |
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Multi-layer AHB bus matrix |
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The main three blocks : platform, core and input / output peripherals |
| THE PROCESSOR CORE |
| THE ARM926EJ-S CORE |
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Operating modes : user, system, super, IRQ, FIQ, undef and abort |
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ALU data path |
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ARM vs Thumb instruction sets, interworking |
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Access to memory-mapped locations, addressing modes |
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Stack management |
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Benefits of condition set capability in ARM state |
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C-to-Assembly interface |
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Exception mechanism, handler table |
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MMU |
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Cache operation |
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JTAG interface |
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Debug facilities |
| PLATFORM |
| INFRASTRUCTURE |
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Power supplies, internal regulator |
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Power-on sequence |
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Clock generator, on-chip oscillator, PLL |
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Reset controller |
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Boot program |
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Memory controller |
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Internal high-speed flash |
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External Bus Interface, SDRAM controller, NAND flash controller |
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Power management controller |
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Advanced interrupt controller |
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External interrupt sources and fast interrupt source |
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Parallel input / output controller |
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Peripheral DMA controller |
| INTEGRATED I/Os |
| TIMERS |
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Periodic Interval Timer |
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Windowed Watchdog |
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Real-time timer |
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3-channel timer / counter |
| ANALOG-TO-DIGITAL CONVERTER |
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Successive Approximation Register 10-bit ADC |
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Detail of the analog part, timings |
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Conversion triggers |
