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AT1 AT91SAM7SE microcontroller implementation

This course covers AT91SAM7SE ARM based microcontroller


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Objectives
bullet_jaune_1 The course details the hardware implementation of the AT91SAM7 microcontrollers.
bullet_jaune_1 The boot sequence and the clocking are explained.
bullet_jaune_1 Practical lab on integrated peripherals are based on I/O functions provided by Atmel.
bullet_jaune_1 The course focuses on the low level programming of the ARM7TDMI core.
bullet_jaune_1 The course provides examples of internal peripheral software drivers.

bullet_jaune_1 Note that ACSYS does not sell emulation probes and IDEs. Consequently this course has not been designed to convince attendees to buy a particular IDE. The unique objective consists in providing sufficient knowledge to attendees so that they can successfully design a system based on AT91SAM7.

bullet_jaune_1 This course has been delivered several times to companies developing embedded systems, such as badges and RF equipments.
A lot of programming examples have been developed by ACSYS to explain the boot sequence, the vector table and the operation of embedded peripherals.

  •They have been developed with 2 different IDEs : Keil and IAR.

  •Consequently for on site course, it is up to the customer to select the IDE under which labs will be run.
A more detailed course description is available on request at info@ac6-training.com
Prerequisites and related courses
bullet_jaune_2 This course provides an overview of the ARM7TDMI core. Our course reference R1 details the operation of this core.
bullet_jaune_2 The following course could be of interest:
bullet_jaune_3 USB Full Speed High Speed and USB On-The-Go, reference IP2

Outline
INTRODUCTION TO AT91SAM7
Overview
bullet_jaune_2 ARM core based architecture
bullet_jaune_2 APB internal busses
bullet_jaune_2 The main three blocks : platform, core and input / output peripherals
THE PROCESSOR CORE
THE ARM7TDMI CORE
bullet_jaune_2 Operating modes
bullet_jaune_2 ALU data path
bullet_jaune_2 ARM vs Thumb instruction sets, interworking
bullet_jaune_2 Access to memory-mapped locations
bullet_jaune_2 Stack management
bullet_jaune_2 Benefits of condition set capability in ARM state
bullet_jaune_2 C-to-Assembly interface
bullet_jaune_2 Exception mechanism, handler table
PLATFORM
INFRASTRUCTURE
bullet_jaune_2 Power supplies, internal regulator
bullet_jaune_2 Clock generator
bullet_jaune_2 Reset controller
bullet_jaune_2 SAM-BA default boot program
bullet_jaune_2 Memory controller
bullet_jaune_2 Internal high-speed flash
bullet_jaune_2 External Bus Interface
bullet_jaune_2 Power management controller
bullet_jaune_2 Advanced interrupt controller
bullet_jaune_2 Parallel input / output controller
bullet_jaune_2 Peripheral DMA controller
INTEGRATED I/Os
NON COMMUNICATION ORIENTED INPUT / OUTPUT PERIPHERALS
bullet_jaune_2 Timers
bullet_jaune_3 Periodic Interval Timer
bullet_jaune_3 Windowed Watchdog
bullet_jaune_3 Real-time timer
bullet_jaune_3 3-channel timer / counter
bullet_jaune_3 16-bit PWM controller
bullet_jaune_2 Analog-to-Digital Converter
bullet_jaune_3 8-channel 10-bit ADC
bullet_jaune_3 Conversion trigger
bullet_jaune_3 ADC timings
COMMUNICATION CONTROLLERS
bullet_jaune_2 2-wire interface
bullet_jaune_3 I2C protocol basics
bullet_jaune_3 Transmit and receive sequences
bullet_jaune_2 SPI
bullet_jaune_3 SPI protocol basics
bullet_jaune_3 External chip-select
bullet_jaune_3 Transfer sequence
bullet_jaune_2 USART
bullet_jaune_3 Individual baud rate generators
bullet_jaune_3 IrDA modulation / demodulation
bullet_jaune_3 Support for Smart Card
bullet_jaune_3 RS485 support
bullet_jaune_2 Synchronous Serial Controller
bullet_jaune_3 I2S analog interface support
bullet_jaune_3 Time Division Multiplexed support
bullet_jaune_3 High speed continuous data stream capabilities
bullet_jaune_2 USB
bullet_jaune_3 Full speed operation
bullet_jaune_3 Endpoint configuration