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N2 IEEE1588 - Precise Time Protocol

This course describes the PTP protocol and provides implementation examples

Objectives
bullet_jaune_1 The course explains the IEEE1588 standard and details some implementation solutions
bullet_jaune_1 The BMC algorithm is described
bullet_jaune_1 The course emphasizes the way to implement IEEE1588 on an Ethernet system and highlights the boundary between software and hardware
bullet_jaune_1 The new features of P1588 (aka IEEE1588v2) are studied
A more detailed course description is available on request at info@ac6-formation.com
Prerequisites
bullet_jaune_2 Knowledge of Ethernet and switching is needed, see our course reference N1

Plan
INTRODUCTION
bullet_jaune_2 Objectives of the standard
bullet_jaune_2 The need for synchronization
bullet_jaune_2 Definitions
PTP CLOCK SYNCHRONIZATION MODEL
bullet_jaune_2 The PTP messages
bullet_jaune_2 PTP systems, acyclic graph structure
bullet_jaune_2 Message filtering
bullet_jaune_2 Clock properties, stratum, identifier
bullet_jaune_2 Subdomain properties
PTP PROTOCOL SPECIFICATION
bullet_jaune_2 Model of a subdomain of PTP clocks
bullet_jaune_2 State behavior of clocks
bullet_jaune_2 Protocol engine state machine
bullet_jaune_2 Clock data sets, initialisation properties
bullet_jaune_2 Messaging and internal event behavior of clocks
bullet_jaune_2 Sync-event time-out mechanism
bullet_jaune_2 Synchronization changes of the local clock
bullet_jaune_2 Best Master Clock algorithm
bullet_jaune_2 Clock variance computation
bullet_jaune_2 Local clock synchronization
bullet_jaune_2 Physical requirements for PTP implementations
bullet_jaune_2 Management messages
ETHERNET IMPLEMENTATION OF PTP
bullet_jaune_2 Ethernet frame type
bullet_jaune_2 IP header and multicast addresses
bullet_jaune_2 UDP header, assigned port numbers
bullet_jaune_2 UDP payload, organization of PTP messages
FREESCALE IMPLEMENTATION OF PTP
bullet_jaune_2 eTSEC Ethernet MAC
bullet_jaune_2 Time-stamping
bullet_jaune_2 Clock correction
bullet_jaune_2 Trigger inputs
bullet_jaune_2 Alarms
P1588
bullet_jaune_2 Mapping to DeviceNet and Ethernet layer-2
bullet_jaune_2 Prevention of error accumulation in cascaded topologies
bullet_jaune_2 Rapid network reconfiguration
bullet_jaune_2 Extensions to enable implementation of redundant systems
bullet_jaune_2 Optional shorter frame