| Formation ARM cores - VFP programming |
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You are here: ac6 > ac6-formation > ARM cores > VFP programming |
| RC0 | VFP programming |
| Objectives | |||
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This course has been designed for programmers wanting to develop algorithm based on hardware floating point calculations. |
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Each instruction family is detailed, first at assembly level, and then at C level using macros. | ||
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Several tricky usage of vector instructions are provided. |
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The underlying cache operation as well as preload mechanisms (instruction and hardware prefetch) are detailed to explain how a processing can be pipelined . |
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The course shows how DSP typical algorithms such as FIR and FFT can be vectorized and then optimized to be executed on VFP unit. | ||
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THIS COURSE IS PROPOSED EITHER AS AN INSTRUCTOR-LED COURSE OR AS E-LEARNING. | ||
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ACSYS has developed an optimized VFP based FFT coded in assembler language | ||
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performance for 1024 complex floating point single precision samples is 220_000 core clock cycles (ARM11) | ||
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for any information contact guillaume.peron@ac6.fr | ||
| Labs are run under RVDS |
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| A more detailed course description is available on request at info@ac6-training.com | |||
| Prerequisites | |||
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Knowledge of 4T / V5TE instruction set. |
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| Outline |
| IEEE754 STANDARD | |||
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Floating point number coding | ||
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Denormalized numbers | ||
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NaN utilization | ||
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Rounding modess | ||
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VFP FPEXC register | ||
| INTRODUCTION TO VFPv3 | |||
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Register bank, D registers, S registers | ||
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Instruction coding, either ARM or Thumb-2 | ||
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Related system registers | ||
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Alignment issues | ||
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Context switching | ||
| VECTOR vs SCALAR OPERATION | |||
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Length / Stride combinations | ||
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Scalar operations | ||
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Vector operations | ||
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Mixed operations | ||
| VFP LOAD / STORE INSTRUCTIONS | |||
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Addressing modes | ||
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Floating point load / store | ||
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Floating point load / store multiple | ||
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Processor acceleration mechanisms: store merging buffers | ||
| ARITHMERICAL INSTRUCTIONS | |||
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Add / subtract / absolute value instructions | ||
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Multiply and multiply accumulate instructions | ||
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Divide instruction | ||
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Square root instruction | ||
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Compare instructions | ||
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Integer to FP and FP to convert instructions | ||
| VFP CODING EXAMPLES | |||
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FIR filter | ||
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Converting the scalar algorithm into a vector algorithm | ||
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Finding the VFP instructions to encode the vector algorithm | ||
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Optimizing the code | ||
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FFT (DFT) | ||
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Converting the scalar algorithm into a vector algorithm, understanding how circle properties can be used to process 4 angles concurrently | ||
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Finding the VFP instructions to encode the vector algorithm | ||
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Optimizing the code | ||
| Duration | Cost | Calendar |
| 1 days | 700 € |
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